| 摘要 |
<p>PURPOSE:To decrease the using frequency of a branch instruction with a condition, and to shorten a processing time. CONSTITUTION:This device is equipped with an instruction memory 2 which stores an instruction for controlling a system, program counter l which designates the reading address, command decoder 3 which controls the operation of a processor by decoding the content of the instruction memory 2, P and Q registers 4 and 5 for an arithmetic input which store data to be computed, arithmetic circuit (EXU) 7 which inputs the data of the P and Q registers 4 and 5, R register 10 for an arithmetic output which stores the output data X, arithmetic flag register 11 which inputs and stores the flag of an arithmetic result from the arithmetic circuit 7 through a multiplexer (MUX) 12, and arithmetic control circuit 9 which controls the execution of a conditional arithmetic operation by using the value as a condition. The arithmetic flag register 11 independently stores the flag of the unconditional arithmetic result and the flag of the conditional arithmetic result.</p> |
