| 摘要 |
PURPOSE:To eliminate the need for a means detecting the clearing of a counter for measuring a period and the preparation of a special counter controlling the number of clearing by simply controlling speed. CONSTITUTION:A counter having a period extremely longer than the output period of an FG signal is used as a counter employed as a free run counter 6. Count data counted by the free run counter 6 are latched by a latch circuit 4 every time the FG signal is output, and the latched data are output to a CPU 7, thus outputting a PWM duty value to a PWM signal generator by the period, etc., of the FG signal. The rotational speed of a motor 1 is controlled on the basis of the PWM duty value, thus omitting a special means detecting the clearing of the counter and interruption processing, then easily controlling the rotational speed of the motor. |
