| 摘要 |
PURPOSE:To monitor the specific contents of a data memory while allowing real time operation by outputting the contents of a specified RAM to the external in a machine cycle in which a CPU does not use a data bus. CONSTITUTION:In the machine cycle in which the data bus 2100 is not used, the CPU1 outputs logical '1' to a control line 1000. Receiving the output, a multiplexer 3 supplies an address supplied through a monitor address input line 3000 as an address specification signal of a data memory 2. Consequently, the contents of the address in the specified memory 2 are latched by a data register 4. Thereby, the data on the specified address in the memory 2 are latched by the register 4 every appearance of the machine cycle in which the CPU1 does not use the bus 2100 by supplying the address specification signal from the external through the line 3000. Thus, whether the contents of the memory 2 are changed or not can be checked by reading out the contents of the register 4 while referring the signal on the line 1000. |
