| 摘要 |
PURPOSE:To constitute all circuits of MOS transistors(TRs) by providing a means controlling driving capability of the circuit depending on the quantity of an analog signal to control a delay and a protection means preventing extreme reduction in the driving capability to a variable delay means. CONSTITUTION:An input signal Cin is delayed by 2 sets of variable delay circuits 3a, 3b and comes to a delayed signal dCin. Then the phase of the signal dCin is compared for its lead or lay with the phase of the innerse of the iCin of the input signal Cin by a phase comparator circuit 4. When the delay in the signal dCin is deficient, since the phase comparator circuit 4 fetches the signal dCin delayed by the inverting signal iCin, the holding output Q is outputted as an H level and the inverse of the output Q is outputted as an L level at the time of stating the signal iCin. Moreover, when the delay is too large, the holding output Q is outputted as an L level and the inverse of the output Q is outputted as an H level conversely. Thus, the fluctuation in the delay is small and stable circuit operation is attained. |
