| 摘要 |
PURPOSE:To enable automatic fast/slow correction for a long period by adding a fast/delay pulse to a second counter counted value at each automatic time correction period which is calculated and stored through a counter, a register, etc., according to manual correction. CONSTITUTION:When an input switch 1 is operated manually, the interval of time correction is counted by a T1 counter 2 which responds to an hour counter 13 is counted and stored in the register 4 while a fast or flow polarity +1 or -1 is stored in a polarity register according to a fast/slow state. A dividing circuit 6 divides the storage contents by a time correcting value obtained by a DELTAT counter 5 and the automatic time correction period which is calculated is stored in a T/DELTAT register. Then when the contents of the counter 7 coincide with the elapsed time from last manual correction which is obtained by a T2 counter 3, a correcting circuit 9 corrects the counter value of the second counter 11 with a specific number of fast or delay pulses according to the contents of he register 10 in response to the dissidence output of the comparison part 8. Repetition is performed thereafter corresponding to the contents of the register 7 to perform the automatic fast/slow time correction for a long period. |
