| 摘要 |
PURPOSE:To increase the limit of the communication speed per channel and to realize a large scale, by providing plural input and output side shift registers within an LSI. CONSTITUTION:The head positions of the frames of the time division multiplex information on incoming highways 1(1)-1(l) are synchronously shifted into input side shift registers 2(1)-2(l) respectively. The shift timings of the registers 2(1)- 2(l) work synchronously with each other, and the channel conversion is carried out with a gate matrix 3 for each time division multiplex information equivalent to a frame. Then the information is transferred to output side shift registers 4(1)-4(l). Here the open/close is designated for each gate of the matrix 3 by the control signal which is previously set to a control shift register group 6. Then the time division multiplex information is fed to outgoing high ways 5(1)- 5(l) from the registers 4(1)-4(l). |
