发明名称 |
Semiconductor memory device. |
摘要 |
<p>Memory cells (12,22...N2) disposed in a matrix are divided into a plurality of blocks. Each block is constructed of n (n is a positive integer larger than 2) memory cell columns. One block is selected by one column address. One memory cell column in the n memory cell columns in a selected block is selected by first gate means. One memory cell column in the n memory cell columns in a selected block is selected by second gate means. One memory cell (12,22...N2) in a selected memory cell column is selected by a row address. The data in a selected memory cell (12,22...N2) are stored in a register and output therefrom. <IMAGE></p> |
申请公布号 |
EP0359203(A2) |
申请公布日期 |
1990.03.21 |
申请号 |
EP19890116871 |
申请日期 |
1989.09.12 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
TODA, HARUKI;OHSHIMA, SHIGEO;IKAWA, TATSUO |
分类号 |
G11C11/401;G11C11/408;G11C11/4096;G11C11/4097;H01L27/10 |
主分类号 |
G11C11/401 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|