发明名称 DATA PROCESSOR
摘要 PURPOSE:To execute a load instruction which requires flag reflection at high speed by directly writing data into a register file from an external bus and simultaneously generating a flag with a flag generation circuit. CONSTITUTION:In the case of the load instruction for writing data in an external memory into the register file, data in the external bus is transmitted to an input data bus 2, and written into the register file 3. When the reflection of the flag such as an MSB flag is required in the load instruction, the flag which is immediately required is generated in the flag generation circuit 8. In the normal operation of inter-register, the flag generation circuit 8 can generates the flag when an operated result is outputted to the input data bus. Thus, the load instruction which requires flag reflection is speeded up and an operation can efficiently be executed.
申请公布号 JPH023822(A) 申请公布日期 1990.01.09
申请号 JP19880153248 申请日期 1988.06.21
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 TAKAHASHI KAZUNORI;KIYOHARA TOKUZO
分类号 G06F9/38;G06F7/00;G06F9/30 主分类号 G06F9/38
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