| 摘要 |
PURPOSE:To enable the miniaturization of a semiconductor device without forming superfluous region in the peripheral part, by decreasing the impurity concentration of an N<-> type semiconductor layer, and reducing the N<-> type semiconductor layer width in the vertical direction. CONSTITUTION:On an N<+> type semiconductor layers 1, 5 and an N<-> type semiconductor layer 2, a P-type semiconductor layer 3 is formed. Herein, the impurity concentration of the N<-> type semiconductor layer is made sufficiently small as compared with conventional devices. The breakdown voltage can be increased by decreasing the impurity concentration in this manner. Further, the the N-type semiconductor layer width 4 in the direction vertical to the surface is reduced, and the impurity concentration is decreased, thereby restraining the increase of resistance. By sufficiently increasing the N<-> type semiconductor layer width 6 in the direction parallel to the surface, a depletion layer can be sufficiently extended, and in particular, the breakdown voltage of the surface can be increased. Further, by arranging an N<+> type semiconductor layer 5, the extended depletion layer becomes difficult to reach the side surface of an element, so that the breakdown voltage of the element can be increased. |
