| 摘要 |
PURPOSE:To reduce the whole circuit size by dividing an input signal into upper bits and lower bits and executing operation. CONSTITUTION:An inputted digital value X consisting of n bits is divided into a value A consisting of upper m1 bits and a value B consisting of lower m2 bits. The upper value A and the lower value B of the digital value X supplied to an input register 1 are respectively supplied to ROMs 2, 3 for executing squaring operation and both the values A, B are supplied to a multiplier 4. The output value A<2> of the ROM 2 is supplied to a 2<2m2> shifting circuit 5 and the output value A.B of the multiplier 4 is supplied to a 2<m2+1> shifting circuit 6. The output value A<2>.2<2m2> of the circuit 5, the output value 2AB.2<m2> of the circuit 6 and the output value B<2> of the ROM 3 are supplied to an adder 7 and the added value of these inputs is outputted to an output register 8 and X<2>. |
