发明名称 SIGNAL PROCESSING DEVICE
摘要 PURPOSE:To make it possible to remove the coupling of signal due to a noxious parasitic capacitance by a method wherein the second and the third gates are newly formed between the first gate and a source and also between the first gate and a drain of an MOS transistor, and an inversion layer is formed on the semiconductor part located directly under the second and the third gates. CONSTITUTION:Sufficient bias voltage is given to the second gate 16 and the third gate 17 by a bias power source 21, an inversion layer 7 is formed on the semiconductor part located directly under the second gate 16 and the third gate 17, and the second and the third gates 16 and 17 are formed as an earth electrode equivalently by against a signal. Said inversion layer 7 works as a resistor, which is series-connected to a source 2 and a drain 3 like a semicon ductor device 20. As a result, the sample-holding circuit in which the semiconduc tor device 20 is used can be operated in the same manner as the sample-holding circuit employing the MOS transistor heretofore in use by the sample pulse added to the first gate 6', and also the coupling of signal caused by the noxious parasitic capacitance generating between the source and the gate and also between the drain and the gate can be removed.
申请公布号 JPS63304667(A) 申请公布日期 1988.12.12
申请号 JP19870139210 申请日期 1987.06.03
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 TANABE KENZO
分类号 H01L29/78;H03K17/687 主分类号 H01L29/78
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