发明名称 RECEIVER
摘要 PURPOSE:To realize uniform performance together with miniaturization size and cost reduction for a receiver by using a circuit which applies >=2 dual gates FET to a balanced signal input input terminal of a double balanced mixer circuit DBM and can perform a signal switching action and an unbalanced/ balanced signal converting action at one time. CONSTITUTION:When VHF is received, the pinch-off voltage is applied to a 2nd dual gate terminal 106 of a dual gate FET 110 to stop the flow of a current to the FET 110. Then a balanced signal is extracted out of the source-drain terminal of a dual gate FET 109. In a UHF reception state the flow of a current is stopped to the FET 109 and a balanced signal is extracted out of the source- drain terminal of the FET 110. This obtained balanced signal is supplied to the balanced signal input terminal of a DBM and mixed with a local oscillation signal which is turned into a balanced signal by an unbalanced/balanced signal converter 116. This mixed signal is turned into an unbalanced signal by a balanced/unbalanced signal converter 118 and delivered to a terminal 119. In such a constitution, the power consumption is reduced and the uniform performance is attained together with miniaturization and cost reduction for a receiver.
申请公布号 JPS63299523(A) 申请公布日期 1988.12.07
申请号 JP19870135020 申请日期 1987.05.29
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 OZEKI HIROAKI;SAKASHITA SEIJI;JINNO IPPEI
分类号 H03H11/32;H04B1/26 主分类号 H03H11/32
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