| 摘要 |
PURPOSE:To rapidly and accurately feed a stepping motor at a predetermined distance even in a system having an irregular feed command generating time interval by setting a pulse rate in response to the time interval detected by time detecting means. CONSTITUTION:Frequency dividing means 16 divides the frequency of a reference clock signal CLK according to a pulse set parameter PD fed from a CPU 1. Counter means 62 performs counting by predetermined number frequency-divided clock signal DCLK output from frequency dividing means 1, generates a gate signal G of logic '1' during counting, and generates a pulse signal TR at the time constant in which the counting period is finished. A driver 63 amplifies and outputs the signal DCLK only during the period in which the gate signal G is of the logic '1'. |
