| 摘要 |
PURPOSE:To ensure the pulse width of a data pulse to a sufficient value by providing a flip-flop or a flip-flop with a selector to an input section and a flip-flop with an output buffer or a flip-flop to an output section. CONSTITUTION:A logic input section supplying an input signal to flip-flops 11a-11c directly or via selector 14 and a logic output section outputting the output of the flip-flops 11d-11f via buffer gates 15a-15c are provided. Since at least flip-flops are provided to the input and output sections of the logic integrated circuit, the signal pulse width outputted from the integrated circuit is ensured to a sufficient value in comparison with the clock width.
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