| 摘要 |
PURPOSE:To prevent an output signal from vibrating by providing a voltage clamp means maintaining the input voltage VGS of a fieldeffect transistor higher than the threshold voltage on the input side of the field-effect transistor. CONSTITUTION:An inverter circuit 14 is connected to the input side of an FET 10 through the voltage clamp means 12. If the voltage clamp means 12 shown in figures (a)-(e) is provided on the input side of the FET 10, its input voltage VGS can be maintained at a higher level than the threshold voltage Vth of the FET 10. As a result, even if a low level signal is supplied to the voltage clamp means 12 through the inverter 14, it can be inputted to the FET 10 by maintaining its level higher than the threshold voltage of the FET 10. Therefore the vibration of the output waveform of the FET 10 can be prevented.
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