| 摘要 |
PURPOSE:To effectively conduct a test on the margin of a write pulse on a path including a RAM by obtaining a write pulse with a phase different from a clock pulse due to the selection of a selection circuit and impressing said pulse with a different phase to the RAM. CONSTITUTION:A write pulse input terminal 21 is connected to the input sides of phase adjusters 25, 26 and 27 through driver circuits 22, 23 and 24. Any of the outputs of the phase adjusters 25, 26 and 27 is selected by the selection circuit 28, and outputted to a write pulse output terminal 29. The selection circuit 28 is controlled by the selection signals of selection terminals 31 and 32. It is assumed that when the output of the phase adjuster 25 is selected, the phase of the write pulse at the time of acting normally is attained, and the outputs of the phase adjusts 26 and 27 are taken for a write pulse selected by phi1 with respect to the write pulse at the time of acting normally, and a write pulse advancing by phi2, respectively. At the time of conducting a test on the write pulse margin, the selection terminals 31 and 32 change the phase of the write pulse, whereby the margins on the tailing and leading edge sides of the write pulse can be tested.
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