| 摘要 |
PURPOSE:To prevent a display image plane from being disordered and to speed up data processing by providing a control means, comparing the current and last counted values of error character signal packets in a stored character signal packet transmission period, and inhibiting data of character signal packets from being displayed only when the counted value tends to increase. CONSTITUTION:If data of a character signal packet has an error, its error output is supplied to a data reception error counter 3, which counts the number of errors of data in every field. At the same time, the error counted value of each field is stored in plural memory areas. A display allowance deciding circuit 4 compares the error counted values of respective fields stored by the data reception error counter 3 and outputs an ON or OFF signal according to the increase/decrease tendency of the number of errors of every time. An AND gate 6 inhibits an input signal from being outputted from a data analytic display circuit 5 unless an H-level signal is inputted from the display allowance deciding circuit 4.
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