发明名称 FIELD EFFECT TRANSISTOR
摘要 PURPOSE:To increase a drain withstand voltage by forming the first drain region of high impurity concentration in the second drain region of the impurity concentration lower than of said first region and further determining the impurity concentration of the second drain region 2 to be higher than that of the third drain region. CONSTITUTION:A channel forming region 2 and a source region 3 are formed by the double diffusion from the end part of a gate electrode 5. The first drain region 6 which is of N<+> type and high impurity concentration is formed in the N-type second drain region 9 which is of the impurity concentration lower than said first region and the region 6 is not in contact directly with the P<-> type semiconductor substrate 1. The P-N junction is formed between the second drain region 9 and the P<-> type semiconductor substrate 1. In the surface part located under a gate electrode in the region between the channel forming region 2 and the second drain region 9, the N<-> type third drain region 10 of the impurity concentration lower than that of the second drain region 9 is formed and is in contact with both of the second drain region 9 and the channel forming region 2. Thus, the electric field in the junction can be exceedingly alleviated.
申请公布号 JPS6258683(A) 申请公布日期 1987.03.14
申请号 JP19850198081 申请日期 1985.09.06
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 ISHIKAWA OSAMU
分类号 H01L29/78 主分类号 H01L29/78
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