| 摘要 |
PURPOSE:To form a control gate having large coupling capacitance by forming the control gate inan element region through self-alignment and shaping a floating gate extending over the control gate from a section on the element region. CONSTITUTION:An Si oxide film 17 is formed onto an Si substrate 11 to which an n<+> layer 12, a mask 13 and Si oxide films 15, 17 are shaped, and the film 17 is left only o the side walls of the mask 13. P doped polycrystalline Si is deposited, and etched up to a level 21, thus obtaining a lower control gate 18. The films 17 on the side walls of the mask 13 are etched, and the gate 18 is divided into control gates 181-184. The mask 13 on the layer 12 is masked with a resist 22, and an exposed mask section is removed. The resist 22 is removed, and a gate oxide film 23 is formed. A P doped polycrystalline Si layer is shaped, and patterned to form a floating gate 24. Accordingly, large capacitive coupling is acquired under the gate 24, and the speed of rewriting time can be increased. |
