| 摘要 |
PURPOSE:To perform stack access at a high speed by using a stack access signal of a microprocessor to add the top of stack cache (TOS cache). CONSTITUTION:The output of an address correcting circuit 1 becomes a memory address of a main memory MM. A write data selector 2 selects data of a data bus DB from a microprocessor muP or a data bus DB1 from a TOS cache 4 and supplies the output to the main memory MM through a memory data bus MDB. A read data selector 3 selects read data from the bus MDB or DB1 and outputs it to the bus DB. Data from the bus DB and a low-order n-bit address signal from an address bus AB are inputted to the TOS cache 4, and the TOS cache 4 outputs data to the write data selector 2 and the read data selector 3 through the bus DB1.
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