| 摘要 |
PURPOSE:To simplify the device and processing required for processing to store an address to a hardware fixed area and for extraction of the address having an error at a main storage when it accesses by providing a faulty main storage device register to a storage controller side. CONSTITUTION:The faulty main storage device address register FSAR8 is arranged as one of input sources to a selector 19 in a storage controller MCU2. The output of a selector 16, that is, one of access addresses selected from the access address supplied from other CPUs and CHPs (channel processing units) in addition to a CPU1 via address ports ADPORT0-15 is fed to the input of the FSAR8, and when the MCU2 detects an error of the MSU (main storage device) and a KSU, the address is set to the FSAR8. Thus, the FSAR is omitted and no associate bus and gate are required. |
