发明名称 |
CONSECUTIVE IDENTICAL DIGIT SUPPRESSION SYSTEM IN A DIGITAL COMMUNICATION SYSTEM |
摘要 |
<p>TITLE OF THE INVENTION Consecutive Identical Digit Suppression System in a Digital Communication System An encoder for suppression of a consecutive identical digit in a digital transmission system facilitates the reproduction of a clock signal for regenerating reception data, and keeping the average signal level constant. According to the present invention, a single bit (x) is inserted for every predetermined number (m) of input digits, and said insertion bit is a complement of the sign of the previous k bits where k is an integer satisfying 1?k?m. Preferably, the value k is 1. The present invention is useful for digital communications higher than 100 Mbits/second, in particular, in optical communications.</p> |
申请公布号 |
CA1186763(A) |
申请公布日期 |
1985.05.07 |
申请号 |
CA19820401079 |
申请日期 |
1982.04.15 |
申请人 |
NIPPON TELEGRAPH & TELEPHONE PUBLIC CORPORATION |
发明人 |
KATO, MASAMI;YOSHIKAI, NORIAKI |
分类号 |
H04L25/49;(IPC1-7):H04B9/00 |
主分类号 |
H04L25/49 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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