| 摘要 |
PURPOSE:To debug a program efficiently and to expand easily the system by using a signal converter or the like generating a digital output corresponding to the 1st and 2nd frequencies. CONSTITUTION:A reproducing signal is converted by an inverter INV1 into a rectangular wave through a low-pass filter via a jack J2, and a signal having nearly 2.4kHz is reproduced, then an initializing signal is fed to a counter F5 from a gate G2 before a carry is generated from the counter F5. Since the content of counter is cleared, no reset signal is applied to a flip-flop F3 and no load signal is given from the gate G2 for a signal having nearly 1.2kHz during the counter time, a reset is applied to the flip-flop F3 from the counter F5. |
