发明名称 SEQUENCE CONTROL DEVICE
摘要 PURPOSE:To prevent a careless malfunction, by connecting a memory unit attachably and ditachably to a control unit, so that a control operation by the control unit can be executed in that case. CONSTITUTION:Unless a memory unit 6 is installed to a connector 14, a CPU1 does not run. Accordingly, a circuit shown in the figure is constituted between a connector 16 of the unit 6 side and the connector 14 of a control unit 7 side. An output of this circuit and an output of a starting circuit 17 are inputted to an NOR circuit 18, an output of the circuit 18 is made a resetting input of the CPU 1, and also the output of the circuit 18 is supplied to a resetting terminal of an I/O port 8 through an invertor 19. Accordingly, in a state that the unit 6 is not installed to the unit 7, the CPU1 does not start its operation even if a start input exists in the circuit 17.
申请公布号 JPS58211206(A) 申请公布日期 1983.12.08
申请号 JP19820093516 申请日期 1982.05.31
申请人 MATSUSHITA DENKO KK 发明人 YODA KENICHI;OKI KOUJI
分类号 G05B9/02;G05B19/042;G05B19/048;G05B19/05 主分类号 G05B9/02
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