| 摘要 |
PURPOSE:To reduce electrostatic capacitance formed to a parallel wiring layer by previously shaping unevenness according to a predetermined pattern with steep difference at a stage to the surface of an insulating film and forming the wiring layer isolated by the stage difference section of the unevenness. CONSTITUTION:The three mutually parallel and adjacent wiring layers 131-133 are formed onto an Si substrate 11 to which an element region is shaped. The uneven pattern, the surface thereof has steep difference at the stage, is molded while being made correspond to a wiring pattern in the film 12. According to such wiring structure, the degree of integration can largely be increased through the improvement of wiring density because electrostatic capacitance formed to the wiring layers can be reduced and a separated distance is made approximately zero. |
