| 摘要 |
PURPOSE:To decrease the limit recovery time of the gain limit amplifying circuit without distortion of output signal, by providing two peak hold circuits having different time constants. CONSTITUTION:The signal input from the input terminal 21 is output to the output terminal 24 via the voltage control type variable attenuation circuit 22 and the voltage amplifying circuit 23. The output is rectified forward with the full wave rectifying circuit 25 and branched into two peak hold circuits 27, 28 with the buffer amplifying circuit 26. The variable attenuation circuit 22 is controlled with the output of the 1st peak hold circuit 27. The bias voltage at the bias terminal 32 is set so that it is greater than the output voltage of the 1st peak hold circuit 27 including the amplitude of the 2nd peak hold circuit 28 including the amplitude of the drift of the 2nd peak hold circuit 28 at the minimum frequency within the frequency range of input signal and at the limit of gain at the maximum level. Thus, the distortion of signal waveform due to the drift of the output of the circuit 27 can be produced. |
