| 摘要 |
PURPOSE:To make it possible to observe easily the check result, by converting the input signal from the external to a false check input signal at a fault time and by leading this signal to a combinational logic circuit and by accumulating a part of the output in a feedback shift register. CONSTITUTION:In the logic integrated circuit such as a programmable logic array incorporating FF, output signals of FF231...23N are applied to the input of logic circuit 1 to perform a normal circuit operation at a normal operation time. Meanwhile, at a fault time, input signal X applied from the external is inputted to input signal converting circuit 3 and is converted to false check input signal 106 and is led to circuit 1, and output signal Y of circuit 1 is accumulated in feedback shift register 2 constituted by FF231...23N. As a result, the check result can be observed easily. |
