发明名称 Bit error detector for PCM date transmission systems - uses shift register generated pseudo-random sequences to indicate transmitter or receiver error
摘要 <p>A bit error detection system for digital PCM data transmission links is based upon pseudo random test signals. A bit-wise comparison is made between a transmitted pseudo random signal sequence and a similar sequence generated in the receiver. Both pseudo random signal sequences are generated using an 'n' stage shift register with feedback coupling. Both the transmitter and receiver generate trigger signals to synchronise the transmission. The comparison process indicates whether the error originates from the transmitter or receiver.</p>
申请公布号 DE2643836(A1) 申请公布日期 1978.04.06
申请号 DE19762643836 申请日期 1976.09.29
申请人 SIEMENS AG;TEKADE FELTEN & GUILLEAUME FERNMELDEANLAGEN GMBH 发明人 LEHMANN,ERWIN,ING.
分类号 G06F11/00;H04L1/24;H04L25/04;(IPC1-7):H03K13/32 主分类号 G06F11/00
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