| 发明名称 |
SEMICONDUCTOR MEMORY DEVICE |
| 摘要 |
PURPOSE:To evade the unbalance in transistor characteristics and increase the scale of integration by making the base or collector regions and their electrode portions of at least two transistors forming a latch circuit symmetrical about the injector region. |
| 申请公布号 |
JPS52155071(A) |
申请公布日期 |
1977.12.23 |
| 申请号 |
JP19760071855 |
申请日期 |
1976.06.18 |
| 申请人 |
FUJITSU LTD |
发明人 |
TOYODA KAZUHIRO;SHIMADA HARUO;OONO SATOSHI |
| 分类号 |
G11C11/411;H01L21/8226;H01L27/02;H01L27/082;H03K3/286 |
主分类号 |
G11C11/411 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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