摘要 |
An improvement in a digital coordinator of the type used for creating a background cycle defined by a series of control pulses repeatedly cycled between a first number, N1, and a second number, N2, with the time space between the N1 control pulse and the N2 control pulse being a background cycle length. This type of coordinator comprises a primary pulse counter means incremented by input counting pulses for creating one in a series of control pulses in response to a selected number of input counting pulses, wherein the input counting pulses have a selected frequency for determining the cycle speed of progression of the control pulses in successive count positions between the N1 control pulse and the N2 control pulse of a given background cycle, and shifting means for shifting the N1 control pulse with respect to time to correspond in time with a synchronization offset signal. The improvement in this type of coordinator includes means for digitally measuring the time period between the N1 control pulse and the occurrence of one of the synchronization offset signals during a given background cycle and further means for stopping the control pulses from the primary counter for the measured time period.
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