发明名称 RECONSTITUTABLE PARALLEL PROCESSOR
摘要 PURPOSE:To reduce communication overhead between element processors (PE), and to execute the parallel processing of sum of products operation in short operation delay time in a parallel processor. CONSTITUTION:The PE 1 is provided with a multiplier 2, an adder 3, a local memory 4, and a switch circuit 5, and the switch circuits 5 in each PE 1 are coupled by a mutual coupling network such as a ring connection network 6, etc. By switching connection in the switch circuit 5, a sum of products computing element containing various number of the multipliers 2 is formed dynamically of plural PEs 1, and the parallel processing of the sum of products operation is executed.
申请公布号 JPH05324694(A) 申请公布日期 1993.12.07
申请号 JP19920125279 申请日期 1992.05.19
申请人 FUJIOKA TOMOCHIKA 发明人 FUJIOKA TOMOCHIKA;KAMEYAMA MITSUTAKA;HIGUCHI TATSUO
分类号 G06F15/16;G06F15/173;G06F15/177;G06F15/80;G06F17/10;G06F17/16 主分类号 G06F15/16
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