| 摘要 |
PURPOSE:To switch a clock supply system while a self-running clock of a PLL is latched. CONSTITUTION:The system is provided with clock selection means 52 selecting a clock from clock supply systems 22, 26, a multiplier means 56 multiplying a frequency of an input clock selected by the clock selection means 52, fault detection means 70, 72 monitoring a generating state of the clock selected by the clock selection means 52 based on an output clock of the multiplier means 56 and detecting the occurrence of a fault in the input clock based on the result of monitor, a changeover means 74 outputting a switching signal to the clock selection means 52 by the detection output of the fault detection means 70, 72, and a PLL provided with a D-T flip-flop 58, a loop filter 64, a voltage controlled oscillator 66 and a frequency divider 68 is used for the multiplier means 56 and the clock is selected while the self-running clock of the PLL is latched. |
