发明名称 Wafer layout of semiconductor device
摘要 A wafer layout for a multi-channel device for improving the yield of operative devices comprises a semiconductor wafer and a plurality of semiconductor devices formed in the semiconductor wafer, each device comprising a consecutive series of impurity regions formed in the semiconductor wafer, the impurity regions being arranged consecutively without separation between the respective semiconductor devices, such that each of the semiconductor devices is indistinguishable from the others, without regard to defective devices, and a single semiconductor device comprising a plurality of consecutive impurity regions formed in the semiconductor wafer may be cut from the wafer by cutting therefrom any of the plurality of consecutive impurity regions formed therein. The invention is particularly useful for the fabrication of strip diodes and the like.
申请公布号 US5872386(A) 申请公布日期 1999.02.16
申请号 US19960680982 申请日期 1996.07.16
申请人 SII R&D CENTER INC. 发明人 SATO, KEIJI;SAITO, YUTAKA
分类号 H01L21/78;H01L29/861;H01L29/872;H01L31/103;H01L31/108;H01L31/18;(IPC1-7):H01L23/58 主分类号 H01L21/78
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