Wafer with improved plating current distribution

摘要

A semiconductor wafer is provided including a plurality of dies, each of the plurality of dies including a plurality of semiconductor devices, a plurality of die seals, each of the plurality of die seals being formed at a perimeter of one of the plurality of dies, and a plurality of electrically conductive links, each of the plurality of conductive links connecting one of the plurality of die seals with another one of the plurality of die seals.

主权项

1. A method of manufacture of a semiconductor wafer, comprising the steps of:
forming a first integrated circuit on a first die of said semiconductor wafer and forming a second integrated circuit on a second die of said semiconductor wafer; forming a first die seal on said semiconductor wafer at the perimeter of said first die and a second die seal on said semiconductor wafer at the perimeter of said second die; and forming an electrically conductive link between said first and the second die seals.