发明名称 |
Programmable logic device logic modules with shift register capabilities |
摘要 |
A logic module for a programmable logic device includes shift register circuitry in addition to the conventional programmable memory cells and look-up table decoder or selection control circuitry. In one embodiment the selection control circuitry can access either the memory cells or the various stages of the shift register. The shift register stages, and preferably the master and slave latches of each shift register stage, are accessed in a Gray code order. All of the stages of the shift register are preferably clearable in parallel. The shift registers of two logic modules are preferably cascadable to facilitate providing longer shift registers. Clock circuitry may be provided to facilitate providing two clock signals that are the logical inverse of one another with a common enable signal.
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申请公布号 |
US2001048320(A1) |
申请公布日期 |
2001.12.06 |
申请号 |
US20010761602 |
申请日期 |
2001.01.16 |
申请人 |
ALTERA CORPORATION |
发明人 |
LEE ANDY L.;JOHNSON BRIAN;CLIFF RICHARD G. |
分类号 |
H03K19/177;(IPC1-7):H03K19/177 |
主分类号 |
H03K19/177 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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