发明名称 DRIVING CIRCUIT OF STORAGE ELEMENT
摘要 PURPOSE:To reduce the variance of delay time of a driving signal and to increase the working speed of a storage device, by forming an address driving circuit, an address strobe clock circuit, etc. on the same substrate to constitute a driving circuit of a storage element. CONSTITUTION:An address driving circuit contains row address registers 30, 31-, column address registers 40, 41-, selecting circuits 70, 71-, address buffers 80 and 80', 81 and 81' respectively in response to the address bits. These address registers 30-, 40- and selecting circuits 70- are controlled via a pulse generator 92 which forms a strobe block circuit together with row strobe clock buffers 97 and 97', column strobe clock buffers 98 and 98', etc. The address driving circuits, address strobe block circuits, etc. which constitute a storage element driving circuit are formed on the same substrate. This reduces the variance of delay time of a driving signal and increases the working speed of a storage device.
申请公布号 JPS58196688(A) 申请公布日期 1983.11.16
申请号 JP19820077814 申请日期 1982.05.10
申请人 NIPPON DENKI KK 发明人 KIMURA ISAO
分类号 G11C11/413;G11C7/00;G11C8/00 主分类号 G11C11/413
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