Apparatus and method for improving data storage by data inversion

摘要

An apparatus includes a processing unit and a memory. The processing unit is configured to encode a plurality of bits to obtain a plurality of encoded bits, the processing unit is configured to determine an inversion decision. When the inversion decision indicates that the subset of the encoded bits shall not be inverted, the processing unit is configured to store, as a stored word, bits of the first codeword into the memory. When the inversion decision indicates that the subset of the encoded bits shall be inverted, the processing unit is configured to invert each encoded bit of a subset of the encoded bits to obtain a second codeword and to store the second codeword into the memory.

主权项

1. An apparatus, comprising:
a processing unit, and a memory, wherein the processing unit is configured to encode a plurality of bits comprising data bits and an indication bit to obtain a plurality of encoded bits by employing a linear error correcting code, wherein each of the plurality of encoded bits has a bit value, wherein the linear error correcting code has a code distance which is at least 3, and wherein the plurality of encoded bits forms a first codeword of the linear error correcting code, wherein the processing unit is configured to determine an inversion decision depending on memory faults of bit errors in the memory or depending on power consumption for storing data into the memory, wherein the inversion decision indicates whether a subset of the encoded bits shall be inverted or not depending on the subset of the encoded bits, wherein the subset comprises at least three of the encoded bits of the plurality of encoded bits, wherein the processing unit is configured to determine the bit value of the indication bit depending on the inversion decision, wherein, when the inversion decision indicates that the subset of the encoded bits shall not be inverted, the processing unit is configured to store, as a stored word, bits of the first codeword into the memory, wherein the bits of the first codeword stored in the memory comprise the indication bit having a first predefined bit value, and wherein, when the inversion decision indicates that the subset of the encoded bits shall be inverted, the processing unit is configured to modify the first codeword of the linear error correcting code to obtain a second codeword of the linear error correcting code by solely inverting each encoded bit of the subset of the encoded bits by changing its bit value, and is configured to store as the stored word bits of the second codeword into the memory, wherein the bits of the second codeword comprise the indication bit being inverted so that the indication bit has a second predefined bit value being different from the first predefined bit value.