Semiconductor device including junction field effect transistor and method of manufacturing the same

摘要

An on-resistance of a junction FET is reduced. In a semiconductor device in an embodiment, a gate region of the junction field effect transistor includes a low concentration gate region and a high concentration gate region whose impurity concentration is higher than an impurity concentration of the low concentration gate region, and the high concentration gate region is included in the low concentration gate region.

主权项

1. A semiconductor device, comprising:
a junction field effect transistor, wherein the junction field effect transistor includes:
a channel region of a first conductivity type as a current passage;a pair of gate regions of a second conductivity type opposite to the first conductivity type, formed so as to sandwich the channel region therebetween; and a source region disposed on an upper surface of the channel region, wherein each of the pair of gate regions includes:
a low concentration gate region; anda high concentration gate region whose impurity concentration is higher than an impurity concentration of the low concentration gate region, wherein the high concentration gate region is included in the low concentration gate region, wherein, in a plan view, with respect to a centerline of the channel region, outer edges of the source region are located between inner edges of the low concentration gate regions of the pair of gate regions, and wherein the channel region extends, with a uniform concentration, from an area between the pair of gate regions to a bottom surface of the low concentration gate region.