Integrated circuits having gate cap protection and methods of forming the same

摘要

Integrated circuits and methods of forming integrated circuits are provided. An integrated circuit includes a gate electrode structure overlying a base substrate. The gate electrode structure includes a gate electrode, with a cap disposed over the gate electrode and sidewall spacers disposed adjacent to sidewalls of the gate electrode structure. A source and drain region are formed in the base substrate aligned with the gate electrode structure. A first dielectric layer is disposed adjacent to the sidewall spacers. The sidewall spacers and the cap have recessed surfaces below a top surface of the first dielectric layer, and a protecting layer is disposed over the recessed surfaces. A second dielectric layer is disposed over the first dielectric layer and the protecting layer. Electrical interconnects are disposed through the first dielectric layer and the second dielectric layer, and the electrical interconnects are in electrical communication with the respective source and drain regions.

主权项

1. An integrated circuit comprising:
a gate electrode structure overlying a base substrate, wherein the gate electrode structure comprises a gate electrode and a cap disposed over the gate electrode; sidewall spacers disposed adjacent to sidewalls of the gate electrode structure; a source region and a drain region formed in the base substrate adjacent the gate electrode structure; a silicide layer disposed over the source region and the drain region; a nitride layer formed over the sidewall spaces and the silicide layer; a first dielectric layer disposed adjacent to the sidewall spacers, wherein the sidewall spacers, the cap, and the nitride layer is disposed between the first dielectric layer and the sidewall spaces and the silicide layer; a protecting layer disposed over the recessed surfaces of the sidewall spacers, the cap; and the nitride layer; a second dielectric layer disposed over the first dielectric layer and over the protecting layer; electrical interconnects disposed through the first dielectric layer and the second dielectric layer and in electrical communication with the respective source region and the drain region.