发明名称 BRIDGE, INFORMATION PROCESSOR AND ACCESS CONTROL METHOD
摘要 PROBLEM TO BE SOLVED: To improve efficiency in access to a memory of a processor from a peripheral device. SOLUTION: A downstream port 22 of a bridge 20 which connects a processor unit and the peripheral device, which is a virtual channel provided in a part to the peripheral device, receives access from the peripheral device through any of a plurality of downstream channels for which the peripheral device accesses the memory of the processor unit using any of them. Relay parts 24, which are a plurality of virtual channels supported by the processor unit, relay the access to the upper channels to which the memory being usable at the time of accessing the memory for each channel is assigned, respectively. In that case, a table in which an identifier of the downstream channel and an identifier of the upstream channel are correlated and stored is referred, and according to the access from the peripheral device, the upper channel corresponding to the downstream channel used by the peripheral device is assigned. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007241904(A) 申请公布日期 2007.09.20
申请号 JP20060066789 申请日期 2006.03.10
申请人 SONY COMPUTER ENTERTAINMENT INC;SONY CORP 发明人 YAMAZAKI TAKESHI;SAITO HIDEYUKI;TAKAHASHI YUJI;MITSUHAYASHI HIDEKI
分类号 G06F13/36 主分类号 G06F13/36
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