发明名称 |
Semiconductor packages with reduced solder voiding |
摘要 |
An example semiconductor package with reduced solder voiding is described, which has a leadframe having an I/O pad and a thermal pad, a fabricated semiconductor die having a bond pad, where the fabricated semiconductor die is attached to a top surface of the thermal pad, and a wire bond connecting the bond pad to the I/O pad, where a bottom surface of the thermal pad has channels. |
申请公布号 |
US9029991(B2) |
申请公布日期 |
2015.05.12 |
申请号 |
US201012927549 |
申请日期 |
2010.11.16 |
申请人 |
Conexant Systems, Inc. |
发明人 |
Warren Robert W.;Lee Hyun Jung;Rossi Nic |
分类号 |
H01L23/495;H01L21/48;H01L23/00;H01L23/31 |
主分类号 |
H01L23/495 |
代理机构 |
Haynes and Boone, LLP |
代理人 |
Haynes and Boone, LLP |
主权项 |
1. A semiconductor package for attaching to a thermal land of a printed circuit board, the semiconductor package comprising:
a leadframe having an I/O pad and a thermal pad; a fabricated semiconductor die having a bond pad, said fabricated semiconductor die attached to a top surface of the thermal pad; a wire bond connecting the bond pad to the I/O pad; wherein a bottom surface of the thermal pad comprises a channel pattern matching a channel pattern of the thermal land, wherein the thermal land is attached to the bottom surface of the thermal pad so as to create channels with upper walls defined by the thermal pad and lower walls defined by the thermal land. |
地址 |
Irvine CA US |