发明名称 TIMING ADJUSTMENT CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To provide a timing adjustment circuit which is used to adjust timing for a difference in delay time or a deviation in that delay time on a propagation line where a plurality of signals are transferred between modules, packages or circuits, and which can be flexibly adapted to suit the arrangement, path and characteristics of the propagation line, as well as its environment conditions and passage of time. <P>SOLUTION: The timing adjustment circuit comprises: delay means of adding a delay successively to pulse signals received via a first propagation line to generate plural N delay signals; change point discrimination means of latching instantaneous values of the plural N delay signals synchronously with a signal received via a second propagation line which is different from the first propagation line, to discriminate between the leading and the trailing edges in time sequences of the instantaneous values of the plural N delay signals; and selection means of selecting a delay signal among the plural N delay signals which corresponds in the time sequences to the leading or the trailing edge or a point of time closest to the leading or the trailing edge. <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP2013090313(A) 申请公布日期 2013.05.13
申请号 JP20110232489 申请日期 2011.10.24
申请人 JAPAN RADIO CO LTD 发明人 KIMURA MASAHO
分类号 H03K5/00;H03K5/14 主分类号 H03K5/00
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