| 摘要 |
An amplifier (A1) within a signal processor comprises a pair of complementary differential pairs (DP1, DP2) in the sense that one differential pair comprises transistors having a polarity opposite to that of transistors in the other differential pair. The one and the other differential pair commonly receive a differential input signal, which has a common mode component. A current combining circuit (CC) combines output currents of the one and the other differential pair so as to obtain an output current that varies as a function of the differential input signal. The one and the other differential pair each have a biasing circuit (R1, R2), which provides a tail current that varies with the common mode component in a substantially linear fashion. |
