发明名称 Memory system and control method for the same
摘要 A memory system in an embodiment having a host and a memory card, including: a plurality of semiconductor memory cells, each cell being configured to store N-bit coded data based on threshold voltage distributions; an LLR table storage section configured to store a first LLR table that consists of normal LLR data corresponding to predetermined threshold voltages and a second LLR table that consists of LLR data such that two LLRs at each location corresponding to each location in the first LLR table at which a sign is inverted between two adjacent LLRs are “0”; and a decoder configured to perform decoding processing through probability-based repeated calculations using an LLR.
申请公布号 US8250437(B2) 申请公布日期 2012.08.21
申请号 US20100796211 申请日期 2010.06.08
申请人 SAKURADA KENJI;UCHIKAWA HIRONORI;KABUSHIKI KAISHA TOSHIBA 发明人 SAKURADA KENJI;UCHIKAWA HIRONORI
分类号 G11C29/00 主分类号 G11C29/00
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