| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a technique for accelerating a decoding speed while suppressing the increase of a processing amount. <P>SOLUTION: A demodulation data memory 32 inputs data to which the addition of a CRC code and encoding by LDPC are performed. An LDPC decoding part 34 repeatedly executes decoding processing by a check matrix by LDPC to the input data. An estimation part 40 estimates the degree of convergence of decoding for respective results of the repeatedly executed decoding processing. An inspection part 38 executes parity check by the CRC code to the respective results of the repeatedly executed decoding processing. A decoding control part 42 determines whether to continue or stop the decoding processing on the basis of the estimated degree of the convergence of the decoding and the result of the parity check every time the decoding processing of one time is ended. <P>COPYRIGHT: (C)2012,JPO&INPIT |
