发明名称 Integrated waking/while-awake power management system with breaking distance timer for high wake-up latency portion of hardware
摘要 A system for activating and deactivating a hardware device including a first stage electronic deactivation unit operative, responsive to a deactivation request, to perform a first deactivation operation including deactivation of a first portion of the hardware device having low wake-up latency at a first time, a second stage electronic deactivation unit including a breaking distance timer activated subsequently to the deactivation request and operative to deactivate a second portion of the hardware device having high wake-up latency at a subsequent second time separated from the first time, and a power management system including a power source and a power supply regulator operative to control the supply of power in accordance with a selectable one of a plurality of regulator settings, selected using a hardware setting selector. Responsive to a wakeup event, the first portion of the hardware device is reactivated and the breaking distance timer is deactivated.
申请公布号 US7971086(B2) 申请公布日期 2011.06.28
申请号 US20070702655 申请日期 2007.02.06
申请人 D. S. P. GROUP LTD. 发明人 ITKIN YUVAL
分类号 G06F1/26 主分类号 G06F1/26
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