发明名称 PROCESSORS
摘要 A processing apparatus comprises a plurality of processors (12), each arranged to perform an instruction, and a bus (20) arranged to carry data and control tokens between the processors. Each processor (12) is arranged, if it receives a control token via the bus, to carry out the instruction, and on carrying out the instruction, to perform an operation on the data, to identify any of the processors (12) which are to be data target processors, and to transmit output data to any identified data target processors, to identify any of the processors which are to be control target processors, and to transmit a control token to any identified control target processors.
申请公布号 US2010228949(A1) 申请公布日期 2010.09.09
申请号 US20080601999 申请日期 2008.05.30
申请人 ANDERSON JAMES ARTHUR DEAN WALLACE 发明人 ANDERSON JAMES ARTHUR DEAN WALLACE
分类号 G06F15/82 主分类号 G06F15/82
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