发明名称 |
PHASE MIXING CIRCUIT AND DELAY LOCKED LOOP CIRCUIT EQUIPPED WITH THE SAME |
摘要 |
<P>PROBLEM TO BE SOLVED: To provide a phase mixing circuit, which prevents the increase of jitter even when PVT is fluctuated, and a delay locked loop circuit equipped with the circuit. <P>SOLUTION: The phase mixing circuit is provided with: a phase mixing unit for mixing a first input signal and a second input signal in response to a phase control signal to output a phase mixing signal whose phase is shifted by an amount corresponding to the multitude of natural number of a unit phase value; and a phase value regulating unit for regulating the unit phase value in response to the PVT code signal comprising PVT fluctuation information. <P>COPYRIGHT: (C)2010,JPO&INPIT |
申请公布号 |
JP2010157986(A) |
申请公布日期 |
2010.07.15 |
申请号 |
JP20090201565 |
申请日期 |
2009.09.01 |
申请人 |
HYNIX SEMICONDUCTOR INC |
发明人 |
JANG JAE-MIN;KIM YONG-JU;HAN SUNG-WOO;SONG HEE-WOONG;OH IC-SU;KIM HYUNG-SOO;HWANG TAE-JIN;CHOI HAE-RANG;LEE JI-WANG;PARK CHANG-KUN |
分类号 |
H03L7/081;G11C11/4076;H03K5/131;H03K5/135 |
主分类号 |
H03L7/081 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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