发明名称 |
Wafer level assemble chip multi-site testing solution |
摘要 |
A chip test system including a probe card, a chip tray and a cover plate fastened on the chip tray. The chip tray comprises a socket, a chip contact area, an extension contact area, and an alignment contact point. The socket loads the testing chip and is customized for the tested chip. The chip contact area has a plurality of chip contact points to electrically contact the chip. The extension contact area has a plurality of extension contact points corresponding to the chip contact points to direct test signals into the chip and direct feedback signals out of the chip. The alignment point provides an alignment location for the probe card during the chip test.
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申请公布号 |
US7595631(B2) |
申请公布日期 |
2009.09.29 |
申请号 |
US20070652064 |
申请日期 |
2007.01.11 |
申请人 |
VISERA TECHNOLOGIES COMPANY LIMITED |
发明人 |
LU SHENG-FENG;HSIAO YU-KUN |
分类号 |
G01R31/28;B07C5/344;G01R31/02;G01R31/26 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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