发明名称 MOUNTING CIRCUIT AND SEMICONDUCTOR TESTING APPARATUS
摘要 PROBLEM TO BE SOLVED: To prevent malfunction of a control circuit and breakdown of a predetermined circuit due to incorrect insertion of a daughter board. SOLUTION: The mounting circuit 1 is mounted with an FCM (Function Module) 11 mounted with a load circuit 17A and an output ON/OFF circuit 14A, and has a PSM (Power Supply Module) 10A to be inserted into the FCM. The mounting circuit 1 includes a three-bit code output circuit 13A to output a bit code for identifying the PSM 10A, and an AND circuit 16A to output an ON/OFF control signal A: Hi signal for operating the output ON/OFF circuit 14A when the ON/OFF control signal for controlling the operation of the bit code and the output ON/OFF circuit 14A, it is detected that the bit code is a signal for indicating the validity of insertion of a PSM 10A, and it is detected that the ON/OFF control signal is the ON/OFF control signal: Hi signal for commanding the operation of the output ON/OFF circuit 14A. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009122073(A) 申请公布日期 2009.06.04
申请号 JP20070299267 申请日期 2007.11.19
申请人 YOKOGAWA ELECTRIC CORP 发明人 TAKEYA SHINJI
分类号 G01R31/26;G01R31/28 主分类号 G01R31/26
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